1. Field of the Invention
This invention relates to image array circuitry and more specifically to the structure of the mage plane circuitry with the supporting circuitry on silicon substrates.
2. Description of the Prior Art
Focal plane arrays such as an infrared focal plane array are normally implemented using an array of detection elements on some substrate surfaces that are bonded electrically to support circuitry surrounding the array itself. The number of substrates surrounding the image array is usually determined by the number of detection elements on the image array itself. Since the support circuitry must be physically located adjacent to the image array itself, the area around the array must be structured to support this additional circuitry. This, in turn, acts as a limit to the size of the focal plane array itself.
It is the object of this invention to provide a structure that allows for the support circuitry to be formed as a three dimensional structure allowing for a greater area to be provided for the focal plane array itself and to require a smaller cold finger to cool the assembly.